Loading [a11y]/accessibility-menu.js
On implementing packet inspection using CUDA enabled graphical processing units | IEEE Conference Publication | IEEE Xplore

On implementing packet inspection using CUDA enabled graphical processing units


Abstract:

This work has the goal to study how an efficient deep packet inspection (DPI) algorithm may be implemented using the graphical processing unit (GPU) CUDA (Computer Unifie...Show More

Abstract:

This work has the goal to study how an efficient deep packet inspection (DPI) algorithm may be implemented using the graphical processing unit (GPU) CUDA (Computer Unified Device Architecture) enabled boards existing in personal computers, and to analyze implementation efficiency. The following tasks have been analyzed: the parallelization of the pattern matching algorithm and the optimization of C code written for Nvidia compiler to obtain the best performance. The conclusion shows that CUDA technology represents a very attractive solution to implement DPI algorithms without the typically memory and complexity constraints.
Date of Conference: 29-31 May 2014
Date Added to IEEE Xplore: 26 July 2014
Electronic ISBN:978-1-4799-2385-4
Conference Location: Bucharest, Romania

References

References is not available for this document.