Abstract:
A new low-power digital signal processor (DSP) design for a hearing aid system is proposed. A stochastic method was applied to the DSP in order to fulfill the needs of th...Show MoreMetadata
Abstract:
A new low-power digital signal processor (DSP) design for a hearing aid system is proposed. A stochastic method was applied to the DSP in order to fulfill the needs of the hearing aid system, considered to be an error-tolerant system. The different blocks that form the DSP are presented in this paper. The implementation and layout were performed and simulated using a 90 nm CMOS process. Simulation results showed excellent energy consumption savings in the range of 4.5x to 10x of the proposed DSP design when compared to similar DSPs.
Published in: 2013 4th Annual International Conference on Energy Aware Computing Systems and Applications (ICEAC)
Date of Conference: 16-18 December 2013
Date Added to IEEE Xplore: 13 February 2014
Electronic ISBN:978-1-4799-2543-8
Print ISSN: 2381-0947
Contents