In designs for battery driven portable applications, the reduction of peak power, peak power differential, average power and energy are equally important. In (S. P. Mohanty et al, Proc. of Intl. Conf on VLSI Design, p.539-545, 2003), a parameter called the "cycle power profile function " (CPF) is defined that captures the above power parameters and a heuristic algorithm is proposed using multiple voltages and dynamic clocking for its minimization. In this paper, we redefine the CPF denoted as CPFMC for multiple voltages and multicycling (MVMC). Then, we modify the nonlinear CPFMC to facilitate its minimization using ILP through datapath scheduling. Experiments conducted for various high level synthesis benchmarks reveal significant reductions in all power parameters.