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Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results | IEEE Conference Publication | IEEE Xplore

Gate oxide protection in HV CMOS/DMOS integrated circuits: Design and experimental results


Abstract:

This article presents a method for protecting the thin gate oxide of CMOS/HVDMOS transistor against damaging from high voltage signal applied to its gate. Also, it provid...Show More

Abstract:

This article presents a method for protecting the thin gate oxide of CMOS/HVDMOS transistor against damaging from high voltage signal applied to its gate. Also, it provides a design methodology and usage conditions related to this protection method. Based on this protection method, DC/DC up converter as well as level up shifter are proposed. The simulation and experimental results confirm the capability of the protection method and show its power to facilitate the design of high voltage circuits up to 300 V.
Date of Conference: 11-14 December 2005
Date Added to IEEE Xplore: 26 September 2008
CD:978-9972-61-100-1
Conference Location: Gammarth, Tunisia

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