In this paper a mathematical model to calculate the maximum switching frequency of a pulse frequency modulation mode buck converter is presented. In order to reproduce the behavior of a real device, some delays and offsets are inserted into the ideal circuit schematic. A mathematical model is therefore developed step by step, starting from the calculation of the load current and considering all the non-idealities inserted in the system. The mathematical model developed is initially compared with the measurements obtained by Computer Aided Design simulations of the buck converter proving a perfect agreement between mathematical model and simulations. Eventually, to validate the mathematical model, a silicon device has been designed. The lab characterization of the sample has lead again to a good match between measurements and model equations.