CMOS imagers are complex systems whose design requires quite different pieces of expertise, namely: pixels, analog signal processing, pixel readout and analog-to-digital conversion, digital signal processing, output drivers, etc. Confronting the design of new imagers require hence the concourse of multidisciplinary teams. However, because correct operation calls for the close interconnection among the different parts, global knowledge is mandatory for successful design. This is particularly pertinent for the newer generations of smart imagers required for high-end applications and/or requiring ultra-high image capture, on-chip image correction, scene interpretation, high dynamic range capture, etc. All these features demand architectural and circuital innovations and pose significant challenges to designers. Also, the increased interest on sensors capable of capturing 3-D scenes raise new challenges at circuit level related to the necessity to interface pixels different from those employed for 2-D capture, on the one hand, and to extract and convert to digital domain time information, on the other hand. This tutorial addresses the design of smart CMOS imagers by following a comprehensive and complete top-down approach where each subsystem is contemplated and described as a part of a whole. Starting the formulation of the performance metrics used to specify and characterize imagers, the tutorial explains how the subsystem behavior and non-idealities impact on the global imager metrics, thereby setting the basis to specify the subsystems for given global image sensor specs. Such methodology is illustrated in the tutorial via a dedicated, MATLAB-based modeling tool which will be employed to allow the attendees gaining insight on the impact of non-ideal sub-systems behaviors. The tutorial overviews the state-of-the-art regarding: pixels; analog signal processing and read-out circuitry; data conversion circuitry, covering both amplitude data converters (required for 2-D ...