Wire-bond, solder ball, and copper pillar are generally utilised as chip-to-substrate interconnects. In this paper, the impact of these types of connections on achievable quality factor of a planar inductor is investigated. A simple and accurate Pi-model of such joints, and mathematical expressions to estimate the model elements are proposed. Results show a good agreement between the model and the EM-simulation results, with inductance accuracy within 10%. At a frequency of 2GHz, simulation results demonstrate that an inductance of 1.26nH with a Q-factor of 154 is achievable on an organic laminate substrate. However, the Q-factor is reduced to 100 when such inductor is connected to a silicon chip via a solder bump flip-chip process. In order to implement and to achieve the required Q-factor, a practical design remedy is introduced.