A high gain low noise amplifier for radiometrie applications in the W band has been designed in 28 nm bulk CMOS technology and characterized experimentally. The design of pads, inductors, capacitors, coplanar waveguides and interconnect lines has been carried out by means of electromagnetic simulations. The parasitic effects of the transistor layout have been evaluated by means of electromagnetic simulations and hand calculations. The amplifier consists of six cascode stages with interstage conjugate matching for the maximum power transfer; the first stage includes also an inductive degeneration for the input integrated matching. Measurement results show a peak gain of 32 dB and a noise figure of 5.3 dB at 91 GHz.