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Stability-Area Trade-off in Static CMOS PUF Based on 4T Subthreshold Voltage Divider | IEEE Conference Publication | IEEE Xplore

Stability-Area Trade-off in Static CMOS PUF Based on 4T Subthreshold Voltage Divider


Abstract:

A physically unclonable function (PUF) where the bitcell core is based on a four-transistor (4T) sub-threshold voltage divider has been presented and validated in our rec...Show More

Abstract:

A physically unclonable function (PUF) where the bitcell core is based on a four-transistor (4T) sub-threshold voltage divider has been presented and validated in our recent work. In this paper, we propose a topological variant to effectively manage the trade-off between stability and area of the proposed PUF. This consists of connecting the body terminals of the two transistors belonging to the 2T sub-circuits within the core block to each other. As a consequence, we reach an area saving of ∼38% in 180-nm CMOS technology compared to the original design, at the cost of slight increase in bit instability as proven by simulations, i.e., 1.18% vs. 1.14% at the TT corner and 2.16% vs. 1.88% when averaged across process corners at golden key (GK) conditions (1.8 V and 25 °C).
Date of Conference: 24-26 October 2022
Date Added to IEEE Xplore: 12 December 2022
ISBN Information:
Conference Location: Glasgow, United Kingdom

References

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