In this paper a new simulation environment for memristive systems using commercial design tools will be presented. The method works across different levels of hardware abstraction (system level, RT-level, circuit level and device level), which allows to evaluate high-level systems properties by changing low-level device features. Our proposed method is using Cadence irun simulation flow, by exploiting Cadence Incisive and Cadence Spectre to enable mixed-signal simulation. As proof-of-concept we are able to simulate a complete RISC-V based CPU on digital level with memristor-based non-volatile flip-flops on the device level, with a throughput of 1.2 instructions/second simulation speed on a modern simulation server.