Hardware Trojan Design and Detection in Asynchronous NCL Circuits | IEEE Conference Publication | IEEE Xplore

Hardware Trojan Design and Detection in Asynchronous NCL Circuits


Abstract:

Hardware Trojans that degrade performance, change functionality, leak information, or halt service, have been problematic in synchronous circuits. Asynchronous circuits a...Show More

Abstract:

Hardware Trojans that degrade performance, change functionality, leak information, or halt service, have been problematic in synchronous circuits. Asynchronous circuits are gaining popularity due to their lower power consumption, and better immunity against PVT (process, voltage, temperature) variations. In this paper, we show some designs to realize hardware Trojans in NULL Convention Logic (NCL), which is a Quasi-Delay Insensitive (QDI) asynchronous digital circuit paradigm. We also present a formal verification methodology to detect such Trojans, and validate our technique on an RSA decryption circuit.
Date of Conference: 23-25 November 2020
Date Added to IEEE Xplore: 28 December 2020
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Conference Location: Glasgow, UK

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