The 0-X multi-stage noise-shaping (MASH) Delta-Sigma-modulator is a possible implementation of a continuous-time (CT) pipeline ADC. One of the main implementation challenges is the matching between the analog and digital signal paths. Since the power consumption of the noise cancellation filter (NCF) becomes significant for high-speed and high-accuracy applications, an estimation of the required accuracy inside the NCF is desirable to give an insight into the prospective overall system complexity. Furthermore, analog mismatches may limit the ADC's performance. This paper shows, that architectures can be found, which relax the coefficient resolution requirement in the NCF thereby facilitating its implementation.