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Analysis and high performance parallel architecture design for EBCOT in JPEG2000 | IEEE Conference Publication | IEEE Xplore

Analysis and high performance parallel architecture design for EBCOT in JPEG2000


Abstract:

This paper presents analysis and design of bitplane parallel architecture for embedded block coding with optimization truncation (EBCOT) tier-1 in JPEG2000. By detailed a...Show More

Abstract:

This paper presents analysis and design of bitplane parallel architecture for embedded block coding with optimization truncation (EBCOT) tier-1 in JPEG2000. By detailed analysis of bitplane parallel context modeling, we discover the reason that causes the degradation of the parallel entropy coding performance. Two improved methods, referred to as data-pairs ordering (DPO) and flexible MQ (FMQ) coder are proposed. The coding speed can be improved greatly by using the improved bitplane parallel coding methods. Compared with the conventional bitplane parallel architecture, our architecture can decrease about 24% of the computation time.
Date of Conference: 14-14 September 2005
Date Added to IEEE Xplore: 27 March 2006
Print ISBN:0-7803-9134-9

ISSN Information:

Conference Location: Genova, Italy

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