A low energy HEVC sub-pixel interpolation hardware | IEEE Conference Publication | IEEE Xplore

A low energy HEVC sub-pixel interpolation hardware

Publisher: IEEE

Abstract:

Sub-pixel interpolation is one of the most computationally intensive parts of High Efficiency Video Coding (HEVC) video encoder and decoder. Therefore, in this paper, a l...View more

Abstract:

Sub-pixel interpolation is one of the most computationally intensive parts of High Efficiency Video Coding (HEVC) video encoder and decoder. Therefore, in this paper, a low energy HEVC sub-pixel (half-pixel and quarter-pixel) interpolation hardware, which uses Hcub multiplierless constant multiplication algorithm, is proposed. The proposed HEVC sub-pixel interpolation hardware, in the worst case, can process 30 quad full HD (3840×2160) video frames per second. It has up to 48% less energy consumption than original HEVC sub-pixel interpolation hardware.
Date of Conference: 27-30 October 2014
Date Added to IEEE Xplore: 29 January 2015
Electronic ISBN:978-1-4799-5751-4

ISSN Information:

Publisher: IEEE
Conference Location: Paris, France

References

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