The aim of the paper is to propose a three-dimensional graphics chip with parallel architecture, in accordance with the chip of the NURBS algorithm was structured. This architecture presents a regular and easily scalable structure, suitable for VLSI implementation, which can be efficiently exploited for the computing process. This architecture can apply to a peripheral device of a computer and a user can use it for fitting curves and surfaces, convert NURBS curves to Bezier and so on, which have 16 bit precision. In this paper, we first describe the framework of the whole system. Secondly, we introduce the hardware of FPGA and explain the principle. Next, we will also illustrate NURBS, and test and verify using Visual C++ and OpenGL. The performance of the proposed architecture is improved by the use of carry save arithmetic which permits the reduction of the system time cycle.