Hardware/Software Co-designed Peripheral Protection in Embedded Devices | IEEE Conference Publication | IEEE Xplore

Hardware/Software Co-designed Peripheral Protection in Embedded Devices


Abstract:

The growth of the cyber-physical systems (CPSs) and the Internet of Things (IoT) in terms of functionality, connectivity, diversity, and size has been significant in the ...Show More

Abstract:

The growth of the cyber-physical systems (CPSs) and the Internet of Things (IoT) in terms of functionality, connectivity, diversity, and size has been significant in the last years. The number of low-cost embedded devices in the field has dramatically increased and even though they enhance our lives in many ways, at the same time they are becoming attractive target for cybercriminals. The variety of these devices makes them vulnerable to new attacks, making the security challenges bigger and more diverse than ever, especially if no protection mechanism are offered. In this work we present a hardware/software co-designed memory protection approach that provides efficient software isolation of tasks, including a novel solution based on an existing concept for fine-grained protection of shared on-chip peripherals. The security extensions are implemented into a RISC-V-based microcontroller and a microkernel-based operating system, have small hardware and software footprint, and do not produce big runtime overhead.
Date of Conference: 06-09 May 2019
Date Added to IEEE Xplore: 01 August 2019
ISBN Information:
Conference Location: Taipei, Taiwan

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