High frequency active sonar usually has high sampling rate, large number of channels and wide processing bandwidth, real-time processing requires transmission and processing of massive data. In this paper, FPGA (Field-Programmable Gate Array) is used for signal processing, the algorithm is decomposed according to the characteristics of FPGA, and the proper structure is selected to reduce the power consumption and volume of the real-time system. According to the characteristics of FPGA, real-time signal processing can be decomposed into multi-channel data demodulation, data overlap, multi-channel data FFT, matrix transposition, steer vector calculation, parallel multiplication, IFFT, matched filtering, and CFAR (constant false alarm rate)processing. Due to the large data volume of data overlap and matrix transposition algorithm, it is necessary to carry out ping-pong buffer in DDR3 to ensure the continuous processing of data. FFT, IFFT, multiplication and DDR controller use the IP core of FPGA to reduce the difficulty of algorithm implementation. The signal processing board has the advantages of simple structure, low power consumption and small size, the simulation data show that the precision of the high frequency active sonar signal processing with FPGA meets the requirement of sonar detection, the experimental data show that the signal processing system of FPGA has good detection performance.