Abstract:
A DLL-based offset calibration loop (OCL) is proposed to eliminate the DC offset and low-frequency flicker noise of the two differential paths to optimize the input signa...Show MoreMetadata
Abstract:
A DLL-based offset calibration loop (OCL) is proposed to eliminate the DC offset and low-frequency flicker noise of the two differential paths to optimize the input signal-to-noise ratio before signal demodulation. The loop technology that can effectively calibrate the offset reduces the false alarm rate of the wake-up receiver (WuRX), and improves the sensitivity and robustness. This design uses 65nm LP CMOS process for layout design and simulation verification. With a supply voltage of 0.4V, the DC offset voltage on the signal path is reduced from an initial 5mV to a calibrated 39µV, resulting in a total system power consumption of 7.4nW.
Published in: 2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)
Date of Conference: 28-30 October 2022
Date Added to IEEE Xplore: 02 December 2022
ISBN Information: