Abstract:
A critical factor in optimizing GaN HEMT performance is minimizing Ohmic contact resistance, which is heavily influenced by the annealing process parameters. This study i...Show MoreMetadata
Abstract:
A critical factor in optimizing GaN HEMT performance is minimizing Ohmic contact resistance, which is heavily influenced by the annealing process parameters. This study investigates the impact of the ramp-up rate during a two-step Ohmic annealing process on the electrical characteristics of GaN HEMTs. By varying the ramp-up rate between 23°C/sec and 38.3°C/sec during the second annealing step, we observed significant improvements in device performance. A faster ramp-up rate resulted in a 34% reduction in contact resistance and a 7% reduction in sheet resistance, along with enhanced uniformity across wafer.
Published in: 2024 15th International Conference on Information and Communication Technology Convergence (ICTC)
Date of Conference: 16-18 October 2024
Date Added to IEEE Xplore: 14 January 2025
ISBN Information: