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WDM-enabled optical RAM and optical cache memory architectures for Chip Multiprocessors | IEEE Conference Publication | IEEE Xplore

WDM-enabled optical RAM and optical cache memory architectures for Chip Multiprocessors


Abstract:

The rapid increase in processor throughput is currently exceeding the electronic memory speed progress, forming the well-known “Memory Wall” problem, forcing current Chip...Show More

Abstract:

The rapid increase in processor throughput is currently exceeding the electronic memory speed progress, forming the well-known “Memory Wall” problem, forcing current Chip Multiprocessor (CMP) configurations to consume more than 50% of the chip real-estate for caching purposes. In that perspective, optical RAMs storing and retrieving information in the form of light with ps-scale memory access times seem to hold the potential for replacing small-size caches, offering at the same time a cache memory system being fully-compatible with optically interconnected CPU-memory architectures. In this article, we present our recent work spanning from WDM-enabled optical RAM bank architectures with optical all-passive row/column decoder modules to a complete 16GHz optical cache memory physical layer design for Chip Multiprocessor configurations and up to the Si-based integrated optical RAM cell architectures currently pursued within the FP7 RAMPLAS project.
Date of Conference: 05-09 July 2015
Date Added to IEEE Xplore: 13 August 2015
Electronic ISBN:978-1-4673-7880-2

ISSN Information:

Conference Location: Budapest, Hungary

References

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