Wormhole switching with virtual channels has been widely deployed in high-speed interconnects at different scales. Its minimal buffer requirements and simple router design promotes its rapid emergence as a preferred switching technique for networks-on-chips as the power and area are two stringent constrains that needs to be considered in such architectures. In this paper we present a simulation model based on OMNet++ to study the performance of wormhole switched interconnects. The developed simulator allows the designer to vary different parameters including number of virtual channels, buffer size, packet size, and wire parameters. The statistics collected from the proposed simulator were in line with previous studies.