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Accurate analog/RF BIST evaluation based on SVM classification of the process parameters | IEEE Conference Publication | IEEE Xplore

Accurate analog/RF BIST evaluation based on SVM classification of the process parameters


Abstract:

The analog/RF functional test which is based on specification circuit testing is very costly due to lengthy test times and highly sophisticated test equipment. Alternativ...Show More

Abstract:

The analog/RF functional test which is based on specification circuit testing is very costly due to lengthy test times and highly sophisticated test equipment. Alternative test measures, extracted by means of Built-in Self Test (BIST) techniques, are a promising approach to replace standard specification-based tests. However, these test measures must be evaluated at the design stage by estimating the Test Escapes (Te) and the Yield Loss (Yl). An accurate estimation of these metrics requires a large non-biased sample of circuit instances including parametric defective ones. A necessary number of these circuits cannot be obtained with a Monte Carlo simulation alone. Statistical learning techniques, in combination with Monte Carlo simulation, can allow the generation of such a sample for multivariate test metrics estimation. The development of Extreme Value Theory (EVT) has provided a rigorous tool for the computation of parametric test metrics. However, this theory is very complex and difficult to apply in the case of multivariate problems. In this paper, we propose an improvement of this approach. The classification of the circuits is based on the specifications and the test limits instead of the extreme thresholds and no post-classification simulation is necessary. Also, we illustrate the use of this model for the evaluation of a filter BIST technique.
Date of Conference: 16-18 December 2014
Date Added to IEEE Xplore: 12 February 2015
Electronic ISBN:978-1-4799-8200-4

ISSN Information:

Conference Location: Algeries, Algeria

References

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