Design of a bus voltage digital controller for a dimmable lighting system with power factor correction | IEEE Conference Publication | IEEE Xplore

Design of a bus voltage digital controller for a dimmable lighting system with power factor correction


Abstract:

This paper presents a design of power factor correction (PFC) stage for a dimmable electronic ballast system to feed a T5 HE 28 W fluorescent lamp. The proposed topology ...Show More

Abstract:

This paper presents a design of power factor correction (PFC) stage for a dimmable electronic ballast system to feed a T5 HE 28 W fluorescent lamp. The proposed topology is composed of a Single-Ended Primary Inductance Converter (SEPIC) used as a PFC stage with variable output voltage in order to supply a half-bridge inverter with an LCC filter controlled by a dedicated IR21592 integrated circuit. A novel dimming method based on controlling the output voltage of the PFC stage together with the variation of the half-bridge switching frequency in a narrow range is proposed and evaluated. A digital compensator design is presented in order to control the SEPIC output voltage. Experimental results for the PFC system are presented in order to test the operation of the entire illuminating system.
Date of Conference: 23-26 October 2016
Date Added to IEEE Xplore: 22 December 2016
ISBN Information:
Conference Location: Florence, Italy

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