Empirical Mode Decomposition (EMD) is used to decompose the signal into its principal constituents called Intrinsic Mode Function (IMF). Although it is one of the most widely used research method with applications seen across number of fields, real-time hardware implementation of EMD is challenging due to its computational intensive loop structure. In this paper we propose a module based approach for hardware implementation of the EMD in FPGA. The proposed architecture uses hardware compatible stopping criteria and a way to mitigate end effects. Xilinx System Generator (XSG), a model based industry standard tool has been proposed to implement the architecture on Xilinx 7-series FPGA (XC7K325T-2FFG900C). Root mean square error of 2.35×10⁻⁴ to 2.597×10⁻⁴ and correlation coefficient of 0.9963 to 0.9981 has been observed for IMF 1 when compared with the Matlab simulation results.