Abstract:
With the continuous shrink of CMOS technology node, the traditional latch circuit suffers from high power consumption owing to the increase of the static leakage current ...Show MoreMetadata
Abstract:
With the continuous shrink of CMOS technology node, the traditional latch circuit suffers from high power consumption owing to the increase of the static leakage current and faces severe reliability issue induced by the single event upset (SEU) in the space environment. To address these issues, a novel Radiation-Hardened Non-Volatile Magnetic Latch Circuit (short for RHNVMLC) is proposed, which mainly consists of four components, i.e., the pre-charge module composed of four PMOS transistors, the SEU-Tolerant latch module composed of four cross-coupled NMOS Dual-input Approximate C-elements (NDAC), the backup and restore module composed of two magnetic tunnel junctions (MTJs) in complementary state to store one bit information with the read/write control circuits, and the shared module composed of two transmission gates (i.e., TG1 and TG2) and three inverters (i.e., INVl, INV2 and INV3). It has four work modes, i.e., the latch, backup, standby and restore modes. By using a physics-based STT-MTJ compact model and a commercial CMOS 40nm design kit, hybrid CMOS/MTJ simulations have been performed to demonstrate its functionality. Simulation results demonstrate that the proposed RHNVMLC not only ensures non-volatility but also provides full SEU tolerance.
Date of Conference: 20-23 October 2024
Date Added to IEEE Xplore: 13 January 2025
ISBN Information: