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A divide-and-conquer strategie for FPGA implementations of large MLP-based classifiers | IEEE Conference Publication | IEEE Xplore

A divide-and-conquer strategie for FPGA implementations of large MLP-based classifiers


Abstract:

This paper presents a methodology to implement large Neural Networks based classifiers in low-cost FPGAs. The idea is to divide the large Neural Network into several smal...Show More

Abstract:

This paper presents a methodology to implement large Neural Networks based classifiers in low-cost FPGAs. The idea is to divide the large Neural Network into several smaller networks which can easily be implemented in small devices. Then, a Multiple Classifier Ensemble is used to joint the results of each small network and thus provide the output of the system. To validate the proposal a classification experiment of terrain images of satellite has been developed and implemented. Obtained results related the size, velocity and performance of the implemented system confirm the viability of the methodology.
Date of Conference: 12-17 July 2015
Date Added to IEEE Xplore: 01 October 2015
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Conference Location: Killarney, Ireland

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