Abstract:
Single event transient (SET) pulses are a significant cause of soft errors in a circuit. To cope with SET pulses, we propose a new storage cell that is able to operate ei...Show MoreMetadata
Abstract:
Single event transient (SET) pulses are a significant cause of soft errors in a circuit. To cope with SET pulses, we propose a new storage cell that is able to operate either as a hard-edge or soft-edge flip-flop depending on the appearance or not of a transition in a time window. The efficiency of the proposed design with respect to the reduction of soft-errors coming from SET pulses was shown with extensive simulations.
Published in: 2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)
Date of Conference: 04-06 July 2016
Date Added to IEEE Xplore: 24 October 2016
ISBN Information:
Electronic ISSN: 1942-9401
Contents 