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A multi-bit/cell PUF using analog breakdown positions in CMOS | IEEE Conference Publication | IEEE Xplore

A multi-bit/cell PUF using analog breakdown positions in CMOS


Abstract:

A physically unclonable function (PUF) utilizing the analog positioning of breakdown spots in CMOS transistors is presented. In contrast to digital positioning based on a...Show More

Abstract:

A physically unclonable function (PUF) utilizing the analog positioning of breakdown spots in CMOS transistors is presented. In contrast to digital positioning based on a three-transistor cell [3], this new approach has the capability of generating multiple bits from a more compact two-transistor cell. The basic properties and reliability aspects of this PUF are studied based on the test chips fabricated in a commercial 40nm CMOS technology. The breakdown positions in high density arrays have been characterized, proving that indeed multiple bits can be generated from a single nFET. Through consecutive measurements, the long-term stability is found to be reduced, due to shrinking of readout window, especially when more bits are generated. Finally, high temperature also negatively impact the stability, indicating that the analog BD-PUF is a lesser promising candidate for PUF application than the previously presented binarized design.
Date of Conference: 11-15 March 2018
Date Added to IEEE Xplore: 03 May 2018
ISBN Information:
Electronic ISSN: 1938-1891
Conference Location: Burlingame, CA, USA

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