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Study of Local BTI Variation and its Impact on Logic Circuit and SRAM in 7 nm Fin-FET Process | IEEE Conference Publication | IEEE Xplore

Study of Local BTI Variation and its Impact on Logic Circuit and SRAM in 7 nm Fin-FET Process


Abstract:

This paper presents an analysis of impact of local bias temperature instability (BTI) by measuring Ring-Oscillators (RO) with short stage and its impact on Logic circuit ...Show More

Abstract:

This paper presents an analysis of impact of local bias temperature instability (BTI) by measuring Ring-Oscillators (RO) with short stage and its impact on Logic circuit and SRAM. The evaluation result of local BTI variation based on measuring RO at a test chip fabricated in 7 nm FinFET process shows that the standard deviation of NBTI Vth degradation is proportional to the square root of the mean value (μ(Δ Vthp)) at any stress time, Vth flavors and various recovery condition. Based on these measurement result, we present an analysis of its impact on logic circuit with considering measured Vth dependency on global NBTI. We also analyze its impact on SRAM minimum operation voltage (Vmin) of static noise margin (SNM) and shows nonnegligible Vmin degradation due to local NBTI.
Date of Conference: 31 March 2019 - 04 April 2019
Date Added to IEEE Xplore: 23 May 2019
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Conference Location: Monterey, CA, USA

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