Abstract:
Shrinking reliability margins have created an increasing demand for circuit aging simulations, which enable product reliability assessment pre-production. Physical Design...Show MoreMetadata
Abstract:
Shrinking reliability margins have created an increasing demand for circuit aging simulations, which enable product reliability assessment pre-production. Physical Design Kits (PDKs) of modern technologies have started to include compact models for transistor degradation mechanisms along with a dedicated reliability simulation framework. In this work, we present a study of the commercial aging models in a 28-nm CMOS technology from a designer perspective by comparison of the simulations with extensive measurement data at the device and the circuit level (ring oscillators). Moreover, using our custom table model compiled from our device-level measurement data, we model the BTI-driven component of circuit-level degradation and provide convincing evidence that mobility degradation due to NBTI plays an important role in the circuit aging phenomenon, thus emphasizing its need in SPICE-level NBTI models.
Date of Conference: 26-30 March 2023
Date Added to IEEE Xplore: 15 May 2023
ISBN Information: