In this work, we explored the self-heating effect (SHE) and performance analysis of Backside Power Delivery Network (BSPDN) technology for routing logical signals from underlying devices to Static Random (SRAM) macros and 3nm technology nodes. A comprehensive evaluation was conducted on the impact of using BSPDN on the thermal effects and performance of circuits in terms of Power, Performance, Area, and Thermal (PP AT) from devices to circuits. And a thermal network model based on device physics is used to describe the SHE on the SRAM macro. This article studies and analyzes the thermal RC network model of the device circuit. Compared with the same design as traditional Front Side (FS) PDNs, the BSPDN structure has better performance, stability, and area advantages. However, owing to the distinctive structural characteristics, the co-design and optimization of circuit performance and thermal reliability using BSPDN present additional challenges.