Abstract:
A general analysis on stochastic timing errors (clock or timing jitter) is presented for Digital to Analog Converters (DACs). The obtained results describe the effects of...Show MoreMetadata
Abstract:
A general analysis on stochastic timing errors (clock or timing jitter) is presented for Digital to Analog Converters (DACs). The obtained results describe the effects of (non)correlated errors for given signal properties, and reveal the nature of the tradeoff between oversampling ratio, resolution and noise shaping in the context of noise-shaped DACs and Continuous-Time (CT) Sigma Delta (EA) ADCs. The importance of timing jitter for wideband DAC performance is exemplified with theory and simulations.
Published in: 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)
Date of Conference: 26-29 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7448-7