A 10-bit 1 MS/s 3-step ADC with bitstream-based sub-DAC and sub-ADC calibration | IEEE Conference Publication | IEEE Xplore

A 10-bit 1 MS/s 3-step ADC with bitstream-based sub-DAC and sub-ADC calibration

Publisher: IEEE

Abstract:

A 3-step Nyquist-rate ADC is presented which makes use of bitstream techniques to design and calibrate the D/A subconverter, while using the same hardware to calibrate th...View more

Abstract:

A 3-step Nyquist-rate ADC is presented which makes use of bitstream techniques to design and calibrate the D/A subconverter, while using the same hardware to calibrate the A/D subconverter. The novel methods presented remove the dependence on offsets and component mismatches in the D/A subconverter. They eliminate the need for a reference ladder in the A/D subconverter and calibrate comparator offsets. In addition, DC offsets in the residue amplifier are calibrated. Simulation results of a prototype in 0.18 /spl mu/ CMOS technology show 10 bits of resolution at an operating speed of 1 MS/s.
Date of Conference: 26-29 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7448-7
Publisher: IEEE
Conference Location: Phoenix-Scottsdale, AZ, USA

References

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