In this work, we present a new CMOS circuit with a bulk input technique called bulk input differential logic (BIDL). A boost circuit is connected to the bulk terminal of the input device to control the substrate bias and generate current difference between the two sides of the differential logic network. A current latch sense amplifier is used to generate a pair of full-swing output signals without DC power dissipation. The logic network is designed without cascoding of devices. Thus a lower resistive path results in the speed improvement. Simulation results show that the BIDL has better speed and power performance compared to conventional differential logic circuits.