Abstract:
This paper presents the design of a multi-bit-third-order low pass sigma-delta modulator using a continuous-time (CT) loop filter. The goal is to reduce the power consump...Show MoreMetadata
Abstract:
This paper presents the design of a multi-bit-third-order low pass sigma-delta modulator using a continuous-time (CT) loop filter. The goal is to reduce the power consumption and the area of the modulator. The new notion is to use a successive approximation (SA) A/D converter as 4-bit quantizer in the sigma-delta-modulator. Simulation results of the CT sigma-delta modulator show a 95 dB signal to noise ratio in a bandwidth of 50 kHz and oversampling ratio (OSR) of 32.
Published in: 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)
Date of Conference: 26-29 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7448-7
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