Abstract:
A 5.5 GHz monolithic VCO is designed in standard 0.24 /spl mu/m single-poly, 5-metal digital CMOS process. The VCO-core draws only 4.8 mW of DC power. The measured phase ...Show MoreMetadata
Abstract:
A 5.5 GHz monolithic VCO is designed in standard 0.24 /spl mu/m single-poly, 5-metal digital CMOS process. The VCO-core draws only 4.8 mW of DC power. The measured phase noise at 1 MHz offset from the center frequency is as low as -114 dBc/Hz. Tuning range of 16% covers the frequency bands for wireless LAN (IEEE802.11a and HiperLAN) standards in 5-6 GHz range. An optimal octagonal inductor structure and nMOS-pMOS complementary cross-coupled topology have enabled simultaneous achievement of low-power and low-phase-noise performance, and requisite tuning range is obtained by using nMOS-in-nwell accumulation varactor.
Published in: 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)
Date of Conference: 26-29 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7448-7