Analysis and optimization of CMOS LNA noise performance with channel resistance | IEEE Conference Publication | IEEE Xplore

Analysis and optimization of CMOS LNA noise performance with channel resistance


Abstract:

Channel resistance cannot be ignored when CMOS circuits operate at radio frequency (RF). Low noise amplifier (LNA) is a very important block in CMOS RF transceiver. The i...Show More

Abstract:

Channel resistance cannot be ignored when CMOS circuits operate at radio frequency (RF). Low noise amplifier (LNA) is a very important block in CMOS RF transceiver. The impact of channel resistance on the noise performance of LNA is thoroughly studied and analyzed, and new formulae are proposed systematically in this paper. Furthermore, revised noise figure optimization technique is presented. All of this work will be very instructive for the design of high performance LNA.
Date of Conference: 26-29 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7448-7
Conference Location: Phoenix-Scottsdale, AZ, USA

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