Abstract:
This paper presents a performance analysis of single-bit full-adder cells using 0.18, 0.25, and 0.35 /spl mu/m CMOS technology. Thirty-one single-bit full adder cells hav...Show MoreMetadata
Abstract:
This paper presents a performance analysis of single-bit full-adder cells using 0.18, 0.25, and 0.35 /spl mu/m CMOS technology. Thirty-one single-bit full adder cells have been prototyped and simulated for power consumption, delay and charging capability. A comprehensive analysis is presented that studies the performance of the single-bit full adder cells using three different CMOS technologies.
Published in: 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)
Date of Conference: 26-29 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7448-7
Contents 