The paper describes new types of sense amplifiers called the input isolated sense amplifier (IISA) for high-speed VLSI applications. The inputs of the sense amplifier are isolated from the incoming signals during the operation. The IISA has totally two positive feedback paths to the inputs and outputs nodes, respectively. Thus the voltage gain can be largely increased In this work, the IISA is used as the receiver of the long interconnection to reduce the RC delay in deep sub-micron process. The simulation in a 0.35-/spl mu/m CMOS process shows that the novel design has 31-58% delay improvement compared to the prior arts. The IISA can also be applied to the memory design and the receiving of large capacitive load signals.