Abstract:
A 3/sup rd/-order lowpass /spl Sigma//spl Delta/ modulator operating with a 0.9-V supply voltage is realized with a standard 0.35-/spl mu/m CMOS process. To achieve ultra...Show MoreMetadata
Abstract:
A 3/sup rd/-order lowpass /spl Sigma//spl Delta/ modulator operating with a 0.9-V supply voltage is realized with a standard 0.35-/spl mu/m CMOS process. To achieve ultra-low-power and tiny-chip-area design, single-opamp-based /spl Sigma//spl Delta/ modulator architecture is proposed and implemented with switched-opamp technique. Employing a novel opamp design with three switching output pairs, the /spl Sigma//spl Delta/ modulator achieves a SNR of 75dB at an ultra low power consumption of 0.2/spl mu/W, which is more than an order lower than existing designs.
Date of Conference: 26-29 May 2002
Date Added to IEEE Xplore: 07 August 2002
Print ISBN:0-7803-7448-7