This paper studies the application and design of variable digital filters (VDF) to realize the sample rate converter (SRC) in a new architecture of software radio receivers. The VDF-based SRC provides variable fractional delay in the passband and additional attenuation in the stopband. The design of the VDF using weighted least squares (WLS) and semidefinite programming (SDP) approaches are described and compared. Design results show that both approaches give similar performances but the computational time is significantly lower for the WLS approach. In addition, the digital all-pass filters are proposed to realize the multistage decimators and half-band filter so that the system delay of the digital IF is reduced. Design results show that the complexity of the digital IF using digital all-pass filters is much lower than that using low-delay FIR filters with the same design specifications.