Abstract:
A new linear tunable CMOS transconductor is presented here. This circuit uses a new low-voltage supercascode transistor to provide a high output resistance. Using a stand...Show MoreMetadata
Abstract:
A new linear tunable CMOS transconductor is presented here. This circuit uses a new low-voltage supercascode transistor to provide a high output resistance. Using a standard 0.8 /spl mu/m CMOS technology simulation results are provided that show the operation of the proposed transconductor with 1.5 V supply voltage featuring less than 0.1% THD for a 10 MHz, 0.6 V peak-to-peak differential input signals. The simulated -3 dB bandwidth is larger than 100 MHz.
Published in: Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.
Date of Conference: 25-28 May 2003
Date Added to IEEE Xplore: 20 June 2003
Print ISBN:0-7803-7761-3
Contents 