Stable high-order delta-sigma DACS | IEEE Conference Publication | IEEE Xplore

Stable high-order delta-sigma DACS


Abstract:

Stability analysis of high-order delta-sigma loops is a challenge. In this work, a novel design criterion is presented for high-order multibit error-feedback DACs which a...Show More

Abstract:

Stability analysis of high-order delta-sigma loops is a challenge. In this work, a novel design criterion is presented for high-order multibit error-feedback DACs which are especially suitable for high-speed operation. This criterion allows the design of stable, robust, and high-resolution delta-sigma DACs. Both analytical and numerical analysis are performed for verification.
Date of Conference: 25-28 May 2003
Date Added to IEEE Xplore: 20 June 2003
Print ISBN:0-7803-7761-3
Conference Location: Bangkok

References

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