Frequency-hopping spread-spectrum wireless digital communication-systems impose stringent requirements on both phase noise and settling time of PLL based frequency synthesizers employed in receivers and transmitters. If a /spl Sigma//spl Delta/-fractional-N-synthesizer is used either the reference frequency or the loop filter order must therefore be high. We theoretically investigate PLLs of higher order and find that the settling time of a sixth order PLL suitable for operation in a Bluetooth transceiver can be as low as 7 /spl mu/s in spite of a reference frequency of 16 MHz.