This work presents a /spl Sigma//spl Delta/ analog-to-digital converter intended for the sensing stage of a cardiac pacemaker. The realized circuit is a practical example of how design techniques devoted to the realization of integrated circuits operating in low-voltage and low-power environment, can benefit a specific application. Particularly the integration of critical blocks of a pacemaker in a sub-micron technology allows to reduce the implantable device size and its power consumption. The /spl Sigma//spl Delta/ converter has been integrated in a 0.8 /spl mu/m CMOS technology and dissipates less than 2.2 /spl mu/W when operated at 1.8 V. According to measurement results, the converter has a DR larger than 50 dB, and has an accuracy of 8-bit with DNL and INL both within /spl plusmn/half LSB. The chip area is below 1 min.