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Area and power optimization of FPRM function based circuits | IEEE Conference Publication | IEEE Xplore

Area and power optimization of FPRM function based circuits


Abstract:

In this paper, a frame of power dissipation estimation for FPRM function based circuits is presented and polarity conversion is proposed to optimize power and area for Fi...Show More

Abstract:

In this paper, a frame of power dissipation estimation for FPRM function based circuits is presented and polarity conversion is proposed to optimize power and area for Fixed Polarity Reed-Muller (FPRM) functions. Based on searching optimized polarity, an optimized algorithm is proposed and implemented in C. The algorithm is tested on MCNC benchmark circuits. Experimental results show a significant reduction of power dissipation without area penalty or with small area penalty compared to those from previous publications.
Date of Conference: 25-28 May 2003
Date Added to IEEE Xplore: 20 June 2003
Print ISBN:0-7803-7761-3
Conference Location: Bangkok, Thailand

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