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An SOI 4 transistors self-refresh ultra-low-voltage memory cell | IEEE Conference Publication | IEEE Xplore

An SOI 4 transistors self-refresh ultra-low-voltage memory cell


Abstract:

Analog and digital subthreshold circuit design have been investigated recently in some niche applications where performance is of secondary concern but ultra-low-power is...Show More

Abstract:

Analog and digital subthreshold circuit design have been investigated recently in some niche applications where performance is of secondary concern but ultra-low-power is needed. In this paper we propose a new four transistors self-refresh memory cell operating in the subthreshold region. Our simulations using a partially depleted SOI 0.25/spl mu/m technology show a good stability of the cell to process and temperature variations. Combining our memory cell with a current sensing scheme and grounded bit-lines leads to good performance despite a very low supply voltage.
Date of Conference: 25-28 May 2003
Date Added to IEEE Xplore: 20 June 2003
Print ISBN:0-7803-7761-3
Conference Location: Bangkok, Thailand

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