Temporally-asymmetric Hebbian learning is a class of algorithms motivated by data from recent neurophysiology experiments. While traditional Hebbian learning rules use mean bring rates to drive learning, this new form of learning involves precise bring times. Hence, such algorithms can capture temporal spike correlations. We present circuits and methods to implement temporally-asymmetric Hebbian learning in analog VLSI. We also describe a small feed-forward 2 layer network that learns spike trains correlations. A chip including a single neuron and a network of adaptive spiking neurons has been fabricated in a CMOS 0.6/spl mu/ process to validate the ideas presented.