A fully differential CMOS distributed amplifier (DA) with a 10-dB pass band gain and 12-GHz bandwidth is described. The fully differential eight-stage DA employs a feedforward distortion cancellation topology. The circuit attains wide bandwidth operation with a high gain and minimal linearity degradation. Input and output are matched to 50-/spl Omega/ using m-derived matching networks, with a worst-case return loss of -10-dB to 8-GHz. The input-referred 1-dB compression point varies from -11.6-dBm at 1-GHz to -13.68-dBm at 10-GHz. The amplifier has an input-referred third-order intercept point of 4.73-dBm. A parasitic-aware simulation methodology was used to optimize the design in a standard 0.18-/spl mu/m CMOS process using Agilent's ADS simulation environment. The eight-stage DA dissipates 145-mW from a single 1.8-V power supply.