Some of the problems that threaten analog design are the reduction of power supply voltage and the decreasing MOS threshold voltages that are inherent to modern process technologies. At the same time it becomes increasingly difficult to take parasitic effects into account. Yet, it is a common trend to integrate even analog RF circuits in today's systems-on-chip. In this paper we targeted the optimization of an RF power amplifier. To this end, we first derived the state-space model equations. After summarizing the limitations of this approach we then present a sizing tool specifically tailored toward the design of optimal RF circuits. This tool is then used for optimally sizing two class E power amplifiers. The result of one experiment compare favorably to a published and measured design.